線形帰還シフトレジスタ
LFSR
https://gyazo.com/802225ef37c69e74c9384102737f7838
System Verilogによる実装
LED(6ビット)に疑似乱数を表示
code:lfsr.sv
assign lfsr0 = lfsr15 ^ lfsr13 ^ lfsr12 ^ lfsr10; always @(posedge sys_clk, negedge rst_n) begin
if (~rst_n)
lfsr <= 16'hCAFE;
else if (~sw_prev & sw)
lfsr <= {lfsr14:0, lfsr0}; end