キャッシュメモリ
Are Processor caches L1, L2 and L3 all made of SRAM? If true, why L1 is faster than L2 and L2 is faster than L3?
Although they use SRAM, they do not all use the same SRAM design. SRAM for L2 and L3 are optimized for size (to increase the capacity given limited manufacturable chip size or reduce the cost of a given capacity) while SRAM for L1 is more likely to be optimized for speed.